CLI-CPU is the open-source reference implementation of the Cognitive Fabric Processing Unit (CFPU) — a new category of processing unit that executes .NET Common Intermediate Language (CIL) bytecode natively in hardware, without JIT compilation, AOT translation, or interpreter layers. Alongside the familiar CPU / GPU / TPU / NPU family, the CFPU is the first MIMD actor-native processing unit: many small, independent CIL-native cores on a single chip, communicating exclusively through hardware mailbox FIFOs in a shared-nothing model. Instead of competing on single-core speed (a battle lost by picoJava and Jazelle decades ago), the CFPU eliminates cache coherency overhead entirely, enabling linear scaling with core count.
The companion project Neuron OS is the capability-based actor runtime co-designed with the CFPU hardware. It shapes the hardware requirements from day one, following the Apple M-series philosophy of OS/silicon co-evolution — but fully open-source.
Architecture
CFPU microarchitecture, Cognitive Fabric positioning, prior art analysis, heterogeneous CFPU Nano + Rich multi-core.
Read →Roadmap
Seven-phase plan from F0 specification to F7, with Tiny Tapeout at F3 and FPGA Cognitive Fabric at F4.
Read →FAQ
What is the CFPU? How does it relate to CLI-CPU? CLI vs CIL? Scheduling costs? Area budget vs Zen 4?
Read →Security Model
Hardware-enforced memory safety, type safety, CFI. Immune to Spectre, Meltdown, ROP, JOP by design.
Read →Neuron OS
Capability-based actor runtime co-designed with the CFPU. OS requirements shape the hardware, following the Apple M-series philosophy.
Visit site →Blog
Project updates, technical deep dives, and the story behind building a CPU that runs .NET natively.
All posts →Latest: Why I'm Building a CPU That Runs .NET Natively
Also on Medium →
GitHub
Source code, simulator, linker, CLI runner, Verilog RTL, cocotb tests. Star us and follow the journey.
View repo →// highlights
- New category — CFPU joins CPU / GPU / TPU / NPU as the first MIMD actor-native PU
- 48 opcodes — CIL-T0 integer subset, fully specified and tested
- 330+ tests — Reference simulator, linker, and runner, all TDD
- ALU in Verilog — 41/41 cocotb tests passing, synthesis-ready
- Shared-nothing — No cache coherency, no locks, linear scaling
- Sky130 target — Tiny Tapeout first silicon, fully open toolchain
- 8M developers — Every .NET language compiles to CIL and runs natively
- Co-designed OS — Neuron OS runtime shapes hardware requirements from day one
- CERN-OHL-S v2 — Strongly reciprocal open hardware license