Blog

Our first FPGA run — Fibonacci(20) = 6765 on real silicon. The three bugs that stood between simulation and silicon.

How we optimized an ML inference chip — six steps from ~15% MAC utilization to 90–95%

The CFPU core family: Nano, Actor, Rich, Matrix, Seal

How the CFPU scales from 600 to 18,000 cores

How we designed a network for 10,000+ processor cores

picoJava failed. Jazelle failed. Here's why CLI-CPU won't. What if your C# code ran directly on the silicon, with no JIT, no interpreter, no runtime? The answer is not faster single-core speed — it's a fundamentally different architecture.